GlobalSIP 2013 Symposium on:

Low-Power Systems and Signal Processing

[Download the PDF Call for Papers]

Ever-shrinking electronic devices require dense circuitry and integrated power, and demand solutions that minimize power and maximize efficiency. Devices must be self-sustaining or very power-efficient to reduce the need for replacement and achieve a greener footprint. Current systems and signal processing paradigms simply consume too much power to meet the projected requirements for ubiquitous sensor nodes.

There have been significant advances in architectures for power-efficient signal processing, but there is still a need to develop low-power signal processing methodologies and ultra-low-power processing platforms to drive down sensor node power requirements. Further, the developments in these areas have to be complementary to truly achieve acceptable performance for the sensor nodes.

The Low-Power Systems and Signal Processing Symposium is an attempt to share ideas on all the aspects of low-power signal processing; analog front-end design, algorithm development and digital hardware architecture.

Submissions of at most 4 pages in two-column IEEE format are welcome on topics including:

  • Speech, Audio and Signal Processing
  • Vision and Image Processing
  • Bio-Medical Signal Processing
  • Sensor Analytics
  • Sensor Fusion
  • Distributed Sensor Networks
  • Body Area Networks

Keynote Speakers

Naveen Verma, Princeton University, Making Sense of the World: Platforms for Analyzing Physically-complex Sensor Signals

The applications driving computing are changing. Mostly, computing used to be about users entering inputs and expecting outputs. Today, computing is Increasingly faced with data generated, not by human users, but by complex processes, which might be sensed through physical transducers, derived from dynamic networks, etc. Generally, we would like to extract some high-value outputs. The problem is that often no tractable models exist for the inputs. Fortunately, algorithmic tools have emerged from the domains of machine learning and statistical signal processing to help analyze analytically-intractable data. While powerful algorithmically, these tools can be computationally intensive, exhausting the system resources available in very low-energy embedded platforms: an unfortunate scenario, considering that some of the most interesting data is available through low-power sensors. This talk looks at how these algorithmic tools utilize system resources and the opportunities that this raises for hardware-specialized platforms. But, increasingly, the platforms themselves are plagued by non-idealities, causing unpredictable behaviors in computation. Having made machine-learning and statistical-signal-processing tools available within the platform, we explore how these can address complex behaviors within the platform alongside complex application data.

Naveen Verma received the B.A.Sc. degree in Electrical and Computer Engineering from the University of British Columbia, Vancouver, Canada in 2003 and the M.S. and Ph.D. degrees in Electrical Engineering from Massachusetts Institute of Technology in 2005 and 2009 respectively. Since July 2009 he has been an Assistant Professor of Electrical Engineering at Princeton University. His research focuses on advanced sensing systems, including low-voltage digital logic and SRAMs, low-noise analog instrumentation and data-conversion, large-area sensing arrays based on flexible electronics, and low-energy algorithms for embedded inference, especially for medical applications. Prof. Verma is recipient or co-recipient of the 2006 DAC/ISSCC Student Design Contest Award, 2008 ISSCC Jack Kilby Paper Award, 2012 Princeton Innovation Forum 1st Prize, 2012 Alfred Rheinstein Princeton Junior Faculty Award, 2013 NSF CAREER Award, 2013 Intel Early Career Honor Award, and the Princeton Walter C. Johnson Prize for Teaching Excellence.

Jennifer Hasler, Georgia Institute of Technology, Physics based Computing Enabling Energy Efficiency Past Moore’s Law

Physical computing techniques are fueled by recent advances in programmable and configurable large-scale analog circuits and systems enabling a typical factor of 1000 improvement in computational power (energy) efficiency over their digital counterparts. The challenge lies in engineering systems to utilize the physics of computing systems more efficiently. This talk presents advances in large-Scale Field Programmable Analog Arrays (FPAA) that enable configurable analog approaches. The ability for nonvolatile analog memory fuels all other innovations. At the same time, these advances have been building a framework to bring these techniques towards a systems perspective, undergoing a similar transformation seen in digital design through the early VLSI age. Taking inspiration from neurobiological systems further improves the resulting energy efficiency.

Jennifer Hasler is a Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology. Dr. Hasler received her M.S. and B.S.E. in Electrical Engineering from Arizona State University in 1991, and received her Ph.D. from California Institute of Technology in Computation and Neural Systems in 1997. Her current research interests include low power electronics, mixed-signal system ICs, floating-gate MOS transistors, adaptive information processing systems, "smart" interfaces for sensors, cooperative analog-digital signal processing, device physics related to submicron devices or floating-gate devices, and analog VLSI models of on-chip learning and sensory processing in neurobiology. Dr. Hasler received the NSF CAREER Award in 2001, and the ONR YIP award in 2002. Dr. Hasler received the Paul Raphorst Best Paper Award, IEEE Electron Devices Society, 1997, IEEE CICC best paper award, 2005, Best student paper award, IEEE Ultrasound Symposium, 2006, IEEE ISCAS Sensors best paper award, 2005, and best demonstration paper, ISCAS 2010. Dr. Hasler is a Senior Member of the IEEE.

Paper Submission

Submit papers of at most 4 pages in two-column IEEE format through the GlobalSIP website at All papers (contributed and invited) will be presented as posters.

Important Dates

Paper Submission DeadlineJune 15, 2013
Review Results AnnounceJuly 30, 2013
Camera-Ready Papers DueSeptember 7, 2013

Organizing Committee

General Chair
Sourabh Ravindran
Texas Instruments Inc.
Technical Co-Chair
Randy Cole
Texas Instruments Inc.
Technical Co-Chair
Nitish Krishna Murthy
Texas Instruments Inc.
Technical Co-Chair
Devangi Parikh
Texas Instruments Inc.